For a complete SPARCstation 5 implementation able to run SunOS, Solaris, BSD, Linux or NeXTstep, see http://temlib.org/ - this fits on a Spartan6 XC6SLX45T FPGA, so you should be able to get it to work on the larger Spartan 6 FPGAs (if you can manage to build a working memory controller...).
It seems that the Panos are only available on eBay US, any idea where to get them in Europe without all the shipping and tax hassle?
Great article, I hope it helps motivate more people to give hardware design a try.
the truth is that most of the HW designers I know are editing inside their Vendor-provided IDEs.
Maybe true for FPGA designers, but not for ASIC designers in my experience.
Another crazy difference I experienced was that builds are NOT deterministic
Yes, hardware generation (synthesis, but mostly optimizations, placement and routing) are not deterministic. SW people are starting to experience that phenomenon with ML as well: you don't fully control what you get, but it works.
This article is the perfect summary of everything that's wrong with the existing HW development toolchains for FPGAs.
The best bit is the windows-only version of the Xillinx gooware that in fact installs a Linux virtual box on windows to finally get to run the tools it needs.
Oh, and yeah : there's a lame protection in there that checks it's running on a specific virtual box with a specific MAC address.
Amazing (not in a good way).
> Alas, I am told by my friends that DDR controllers are no joke; they are not the playground of bored SW engineers.
No, they definitely aren't funny. I've worked with FPGAs and DDR controllers at college and their can be a big PITA. Even with DDR controller libraries you can still run into all sorts of timing issues.
This article brings up an interesting question...
What other cheap hardware products contain FPGA's that are potentially user accessible?
I started a new message chain for this:
Ask HN: What other cheap hardware products contain FPGA's?
On a side-note of pedantry, we really need to stop using the term ‘compiling’ in the context of FPGAs and HDLs. To ‘compile’ is to assemble a dossier of documents and/or fill in forms - this is why Grace Hopper called her automatic code generation contraption a ‘compiler’: because, quite appropriately, it took the description of actions to be undertaken by the machine and fleshed them out in a ritualistic fashion in lower-level instructions.
HDLs and FPGAs have very different principles and objectives. The best term is ‘instantiate’, because one creates an instance of a given hardware description upon the substrate of gates provided by the array.
I’m sure I’ll be told I’m nit-picking, but those who do so would probably recoil in horror at the faux pas of some n00b saying a browser “compiles HTML” and tell them the correct term is ‘render’, and they’d be right.
Please, let’s be careful and deliberate about the terms we use, can we please?
Another design to target at one of these boxes could be Milkymist [1], uses the lm32 CPU and various peripheral cores.
This is awesome!!! (Ultra)SPARC CPU's are a joy to code for in assembler, and modern T3, T4 and T5's are number crunching monsters.
How about synthesizing the GPL-licensed OpenSPARC T2 now?
https://www.oracle.com/technetwork/systems/opensparc/openspa...
I'd love to have SmartOS backported on a FPGA-based, OpenSPARC T2, 19" 1U rack mountable server someday. Free hardware and software all the way.
Hmm, yeah, that does look affordable. Lots of ads on ebay.
"Lot of 25 Pano Logic Thin / Zero Desktop Client Black w/ Power Supply
Buy now: US $170.00"
I wonder what the thinking was that lead Pano Logic to put expensive FPGAs inside these units, instead of some more typical cheap ARM SoC?
Edit: Ah, they operated in 2006-2012. I guess that was just before the rise of the very cheap/fast SoCs.
Well, for comparison, the cost of a current 100K LUT FPGA on a board is:
$250 for Xilinx Artix-7:
https://store.digilentinc.com/arty-a7-artix-7-fpga-developme...
$100 for Lattice ECP5 (85K LUT):
https://www.latticestore.com/products/tabid/417/categoryid/5...
This use of expensive surplus hw reminds me of the nsa@home project
In one of the bash scripts in this article there's a lot of " || exit 1", you can enable this automatically by using "set -e" at the beginning of the script, this works for POSIX shell too. You can get extra safety in bash specifically by doing something like "set -euo pipefail" that will exit on errors, including pipeline failures and also on undefined variables.
For those interested in hacking in this:
The Pano G2 FPGA is a monster, but prices on eBay have gone up a lot. My cheapest buy was 25 of them for $85 (including shipping!). They now go for around 1 for $30 if you’re lucky... or $200+ for many.
The Pano G1 (with VGA instead of DVI) is cheaper but has a much smaller FPGA, though still large by hobby standards.
The benefit of the G1 is that all interfaces are working now, including DRAM, USB, Ethernet.
Last week, Skip Hansen got a full CP/M system running on one: https://github.com/skiphansen/pano_z80
USB on the G2 is hard. A bunch of people have tried and failed.