This is a fantastic program for teaching students about VHDL. You can make some really cool stuff on a 130nm process with 10mm^2 available. Like a full toy SoC. Really cool.

I was very upset this was not about making Potato Chips. Seriously.

Schedule

    April 11, 2022: Project submission is OPEN
    June 8, 2022: Project submission is CLOSED

> The repo must include project documentation and adhere to Google's inclusive language guidelines. See details here.

"Inclusive". Ah.

When I'm writing technical documentation, it has one goal: to describe the project to anyone who wants to use it. "Inclusivity" is not a part of my goalset.

Does anyone have any in sight into how often they do these shuttles? Probably going to miss tapeout for this round but it'd be cool to get a physical chip some day, just for coolness.

I wonder how difficult/efficient would it be to use this tech to design a bitcoin mining ASIC.

So how many transistors ( or GATES? ) that 10mm^2 is at 130nm?

Money for nothing...

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